Field
The subject matter disclosed herein relates to a switching power supply converter and more particularly relates to efficient operation of a DC-DC converter using a synchronous rectifier (“SR”) MOSFET.
Description of the Related Art
Although conventional self-synchronized flyback DC-DC converters with synchronous rectification operate quite well in a discontinuous conduction mode (“DCM”), they experience an inefficient SR turn off in a continuous conduction mode (“CCM”). Up to now solutions to that problem are somewhat costly. For example, FIG. 1a is a block diagram of a conventional self-synchronized flyback DC-DC converter with synchronous rectification, using a delay generator 107 on the primary side to avoid adverse effects of fast transients resulting from a hard switching to “on” of the primary power switch MOS 1. The fast transients do not allow the SR switch MOS 2 on the secondary side to turn off quickly enough. This results in rather significant and undesirable reverse currents flowing through MOS 2.
The delay generator 107 is provided to delay the turn-on of MOS 1, so that MOS 2 may be completely turned off when the MOS 1 is turned on. The delay generator 107 includes a delay device 105 and a third switch MOS 3 connected in series with a capacitor Cn, which are connected in parallel with MOS 1. As shown in FIG. 1b, the delay device 105 includes an RC cell connected on an upper buffer driver of a bipolar complementary stage circuit. This RC cell is embodied by the resistor Rd and the capacitor Cd. The values of Rd and Cd may be selected or adjusted to establish the appropriate or desired delay time. Alternatively, a digital counter or some other appropriate component may be used instead. Nevertheless, this delay generator 107 utilizing a number of discrete components on the primary side is not cost effective.